This paper compares the complex instruction set and reduced instruction set computer design philosophies. Typical characteristics, instructions, and advantages and disadvantages of each philosophy are explained. This paper then proceeds to describe how complex instruction set computers (CISC) and reduced instruction set computers (CISC) have been combined to form a hybrid known as a Complex/Reduced instruction set Computer (CRISC).

Two basic computer design philosophies predominant in the market today are the complex instruction set and the reduced instruction set. Immediately, one might be lead to believe by their names that the size of the instruction sets is what distingui shes the two, but the differences extend much further. These philosophies differ in their instruction lengths, addressing modes, number of registers, and the number of clock cycles needed to execute an instruction.

Complex instructions came about in order to maximize the performance of early computers. At that time, computers executed instructions sequentially. The first instruction had to complete the execution cycle before the next instruction could begin. Designers combined sequences of instructions into single instructions. This reduced the amount of time spent retrieving instructions from memory [CHAR], although these instructions did require multiple clocks cycles to execute.

CISC philosophy used microcode to simplify the computer's architecture. In a microprogrammed system, the ROM contains a group of microcode instructions that correspond with each machine-language instruction [APPL]. When a machine-language instr uction arrives at the processor, it executes the corresponding series of microcode instructions. In a nutshell, microcode acts as a transition layer between the instructions and the electronics of the computer. This also improved performance, since instru ctions could be retrieved up to ten times faster from ROM than from main memory. Other advantages of using microcode included fewer transistors, easier implementation of new chips, and a microprogrammed design can be easily modified to handle new instruct ions sets [APPL].

Another characteristic of complex instructions set is their variable-length instruction format. Variable-length instructions were used to limit the amount of wasted space, although they do require special decoding circuits that count bytes within words and frame the instructions according to their byte length [MANO]. In the VAX, binary and arithmetic operations have two or three operands, while string operations have three or five operands [APPL].

A large number of addressing modes also characterizes complex instruction set computers. The VAX, an example of a complex instruction set computer, has the following modes: to/from a register, to/from a specific location in memory, to/from an address p ointed to by a register, to/from an address pointed to by a memory location, to/from an address offset from a base address in a register, to/from an address offset from a base address in memory, etc…[APPL]. Due to the large number of addressing modes, the re are more than 30,000 versions of integer add in the VAX [PATT].

Another characteristic of the CISC design philosophy is the small number of general-purpose registers, typically about 8 registers [HALF]. This is a result of having instructions, which can operate directly on memory [APPL].

Advantages of complex instruction set machines include

• Less expensive due to the use of microcode; no need to hardwire a control unit [APPL]
• Upwardly compatible because a new computer would contain a superset of the instructions of the earlier computers [APPL]
• Fewer instructions could be used to implement a given task, allowing for more efficient use of memory [APPL]
• Simplified compiler, because the microprogram instruction sets could be written to match the constructs of high-level languages [APPL]
• More instructions can fit into the cache, since the instructions are not a fixed size [TURL]

Although the CISC philosophy did much to improve computer performance, it still had its drawbacks:

• Instruction sets and chip hardware became more complex with each generation of computers, since earlier generations of a processor family were contained as a subset in every new version [APPL]
• Different instructions take different amount of time to execute due to their variable-length [APPL]
• Many instructions are not used frequently; Approximately 20% of the available instructions are used in a typical program [APPL]

The VAX is one example of a CISC. As stated above, it has a large number of addressing modes. Another CISC characteristic it exhibits is variable-length instructions. Binary and arithmetic operations require 2 or 3 operands, but string operations n eed 3 or 5 operands [APPL].

Another computer family that is classified as a complex instruction set computer is the Motorola 68000 family. It contains few general-purpose registers: 8 data registers and 8 address registers. It also uses variable-length instructions. Each inst ruction in one of these computers requires 0, 1, or 2 operands [APPL].

Other typical complex instruction set computers include the IBM 370 and Intel's 80x86 line of computers.

In the mid 1970s, developments in technology made RISC attractive to computer designers [CHAR]. Some of these developments were great increases in memory size with corresponding decreases in cost, high-speed caches, advanced compilers, and better p ipelining [CHAR]. Due to these developments, IBM designed the first reduced instruction set computer [PROS].

RISC architecture makes use of a small set of simplified instructions in attempt to improve performance [APPL]. These instructions consist mostly of register-to-register operations [MANO]. Only load and store instructions access memory [MANO]. Sinc e almost all instructions make use of register addressing, there are only a few addressing modes in a reduced instruction set computer [MANO] and there are a large number of general-purpose registers [PROS]. For example, a PowerPC has 32 registers [PROS].

Another way in which reduced instruction set computers sought to improve performance was to have most instructions complete execution in one machine cycle. Pipelining was a key technique in achieving this. Pipelining allows the next instruction to ente r the execution cycle while the previous instruction is still processing [PATT].

Another technique utilized by reduced instruction set machines is prefetching coupled with speculative execution [HEUR]. If the processor has fetched a branch instruction, it does not wait to see if the condition has been met. It "guesses" whether or n ot the condition will be met, and begins execution of the corresponding code. If the processor guessed correctly, it has gained time. If the processor has guessed incorrectly, the results are discarded and there is no loss [HEUR].

Reduced instruction set machines, unlike complex instruction set machine, use same length instructions so that the instructions are aligned on word boundaries and may be fetched in a single operation [APPL]. Typically, a reduced instruction set compute r stores its instruction in 32 bits [APPL].

RISC microprocessors also emphasize floating-point performance making them popular with the scientific community whose applications do more floating-point math [PROS]. For this reason, most RISC microprocessors have floating-point units (FPUs) built in [HALF].

Advantages of a reduced instruction set machine:

• Faster [APPL]
• Simpler hardware [APPL]
• Shorter design cycle due to simpler hardware [CHAR]
• Lower cost since more parts can be placed on a single chip [APPL]

Drawbacks of a reduced instruction set computer include

• Programmer must pay close attention to instruction scheduling so that the processor does not spend a large amount of time waiting for an instruction to execute [APPL]
• Debugging can be difficult due to the instruction scheduling [APPL]
• Require very fast memory systems to feed them instructions [APPL]

The PowerPC is a typical reduced instruction set computer. It contains many general-purpose registers (32 in all) and a floating-point unit [STAL]. It also takes advantage of pipelining to approach the goal of one instruction per clock cycle [STAL] . Prefetching and speculative execution are other methods the PowerPC uses to speed execution of instructions [HEUR].

Another processor that implements a RISC architecture is the SPARC. In the SPARC, all instructions are 32-bits in length. Another RISC feature of the SPARC is that only load and store instructions are allowed to access memory. Arithmetic operations are performed only on values in the registers [HEUR].

Other computers classified as having reduced instruction sets are the MIPS and the Alpha.

Today, the distinction between RISC and CISC is becoming rather fuzzy. The first hints of RISC technology began to appear in Intel's 80x86 processor in 1989, when the 486 had a FPU, more hard-wired instruction logic, and pipelining [HALF]. Other ma nufacturers have followed suit such as Cyrix. Cyrix's M1 also takes advantage of pipelining to increase instruction execution [HALF]. Another RISC characteristic the M1 has borrowed is a large number of general-purpose registers. The M1 has 32 general-pur pose registers by using a technique called dynamic register naming, which makes it appear as if there are only 8 registers in use at a time. This preserves compatibility with existing software that expects to see only 8 registers [HALF].

One computer that exhibits features of both CISC and RISC is the Cyrix M1. The M1 has the same micro-architecture as the Intel 80x86 family of complex instruction set machines. It has 32 general-purpose registers as a typical reduced instruction se t computers, but by using a technique called dynamic register naming, only 8 registers are visible at a time. This permits the M1 to preserve compatibility with existing software [HALF].

The Pentium is another CISC/RISC hybrid. It uses variable-length instructions and few general-purpose registers as a complex instruction set computer would, but it adopts RISC-like features, pipelining and a floating-point unit [HALF]

Complex instruction set computers and reduced instruction set computers differ greatly. CISC has a large, complex instruction set, variable-length instructions, a large number of addressing modes, and a small number of general-purpose registers. On the other hand, RISC has a reduced instruction set, fixed-length instructions, few addressing modes, and many general-purpose registers. Today, designers are producing a hybrid of the two design philosophies known as a complex/reduced instruction set com puter. These computers combine characteristics such as variable-length instructions, few general-purpose registers, pipelining, and floating-point units.